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INTEGRATED CIRCUITS
DATA SHEET
74LVC157A Quad 2-input multiplexer
Product specification Supersedes data of 1998 Jul 29 2002 Mar 15
Philips Semiconductors
Product specification
Quad 2-input multiplexer
FEATURES * 5 V tolerant inputs for interfacing with 5 V logic * Wide supply voltage range from 1.2 to 3.6 V * CMOS low power consumption * Direct interface with TTL levels * Inputs accept voltages up to 5.5 V * Complies with JEDEC standard no. 8-1A * Specified from -40 to +85 C and -40 to +125 C. DESCRIPTION The 74LVC157A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 and 5 V environment. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 2.5 ns. SYMBOL tPHL/tPLH PARAMETER propagation delay nI0, nI1 to nY E to nY S to nY CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; (CL x VCC2 x fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC. input capacitance power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2 CL = 50 pF; VCC = 3.3 V CL = 50 pF; VCC = 3.3 V CL = 50 pF; VCC = 3.3 V 2.6 2.8 2.6 5.0 15 CONDITIONS
74LVC157A
The 74LVC157A is a quad 2-input multiplexer which select four bits of data from two sources under the control of a common select input (S). The four outputs present the selected data in the true (non-inverted) form. The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all the other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74LVC157A. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as function generator. The device is useful for implementing highly irregular logic by generating any 4 of the 16 different functions of two variables with one variable common. The 74LVC157A is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S.
TYPICAL ns ns ns pF pF
UNIT
2002 Mar 15
2
Philips Semiconductors
Product specification
Quad 2-input multiplexer
ORDERING INFORMATION PACKAGES TYPE NUMBER 74LVC157AD 74LVC157ADB 74LVC157APW FUNCTION TABLE See note 1. INPUTS E H L L L L Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care. PINNING PIN 1 2, 5, 11 and 14 3, 6, 10 and 13 4, 7, 9 and 12 8 15 16 S 1I0 to 4I0 1I1 to 4I1 1Y to 4Y GND E VCC SYMBOL S X L L H H nI0 X L H X X nI1 X X X L H TEMPERATURE RANGE PINS -40 to +125 C -40 to +125 C -40 to +125 C 16 16 16 PACKAGE SO SSOP TSSOP
74LVC157A
MATERIAL plastic plastic plastic
CODE SOT109-1 SOT338-1 SOT403-1
OUTPUTS nY L L H L H
DESCRIPTION common data select input data inputs from sources 0 data inputs from sources 1 multiplexer outputs ground (0 V) enable input (active LOW) supply voltage
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3
Philips Semiconductors
Product specification
Quad 2-input multiplexer
74LVC157A
handbook, halfpage
S1 1I0 2 1I1 3 1Y 4
16 VCC 15 E 14 4I0
handbook, halfpage
2
3
5
6
11
10
14
13
1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 1 15 S E 1Y 4 2Y 7 3Y 9 4Y 12
MNA481
157
2I0 5 2I1 6 2Y 7 GND 8
MNA480
13 4I1 12 4Y 11 3I0 10 3I1 9 3Y
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
1 15
handbook, halfpage
G1 EN
2 3 5 MUX 4 6 11 10 14 13 12
1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 SELECTOR MULTIPLEXER OUTPUTS
1Y
4
2 3 5 6 11 10 14 13
1 1
2Y
7
7
3Y
9
9
4Y 12
S
MNA482
E 15
MNA483
1
Fig.3 Logic symbol (IEEE/IEC).
Fig.4 Functional diagram.
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4
Philips Semiconductors
Product specification
Quad 2-input multiplexer
74LVC157A
handbook, halfpage
S
E
1I1 1I0
1Y
2I1 2I0
2Y
3I1 3I0
3Y
4I1 4I0
4Y
MNA484
Fig.5 Logic diagram.
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5
Philips Semiconductors
Product specification
Quad 2-input multiplexer
RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times VCC = 1.2 to 2.7 V VCC = 2.7 to 3.6 V CONDITIONS for maximum speed performance for low voltage applications MIN. 2.7 1.2 0 0 -40 0 0
74LVC157A
MAX. 3.6 3.6 5.5 VCC +125 20 10 V V V V C
UNIT
ns/V ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO IGND, ICC Tstg Ptot PARAMETER supply voltage input diode current input voltage output diode current output voltage output source or sink current VCC or GND current storage temperature power dissipation per package SO package SSOP and TSSOP packages Note 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. above 70 C derate linearly with 8 mW/K above 60 C derate linearly with 5.5 mW/K - - 500 500 mW mW VI < 0 note 1 VO > VCC or VO < 0 note 1 VO = 0 to VCC CONDITIONS - -0.5 - -0.5 - - -65 MIN. -0.5 MAX. +6.5 -50 +6.5 50 VCC + 0.5 50 100 +150 V mA V mA V mA mA C UNIT
2002 Mar 15
6
Philips Semiconductors
Product specification
Quad 2-input multiplexer
DC CHARACTERISTICS Over recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = -100 A IO = -12 mA IO = -18 mA IO = -24 mA VOL LOW-level output voltage VI = VIH or VIL IO = 100 A IO = 12 mA IO = 24 mA II ICC ICC input leakage current 2.7 to 3.6 - 2.7 3.0 - - - - - - - 0.1 0.1 5 0.2 0.4 0.55 5 10 500 - - - - - - 2.7 to 3.6 VCC - 0.2 2.7 3.0 3.0 VCC - 0.5 VCC - 0.6 VCC - 0.8 - - - - - - - - VCC (V) 1.2 1.2 MIN. VCC - -40 to +85 TYP.(1) - - - - MAX. - - GND 0.8 2.0 - - Tamb (C)
74LVC157A
-40 to +125 MIN. VCC MAX. - - GND 0.8 - - - - 0.3 0.6 0.8 20 40 5000
UNIT
V V V V V V V V V V V A A A
2.7 to 3.6 2.0 2.7 to 3.6 -
VCC - 0.3 VCC - 0.65 VCC - 0.75 VCC - 1
VI = 5.5 V or GND 3.6 3.6
quiescent VI = VCC or GND; supply current IO = 0 additional quiescent supply current per input pin VI =VCC - 0.6V; IO = 0
2.7 to 3.6 -
Note 1. All typical values are at VCC = 3.3 V and Tamb = 25 C.
2002 Mar 15
7
Philips Semiconductors
Product specification
Quad 2-input multiplexer
AC CHARACTERISTICS GND = 0 V; tr = tf 2.5 ns. Tamb (C) SYMBOL PARAMETER WAVEFORMS -40 to +85
74LVC157A
-40 to +125
UNIT
MIN. TYP.(1) MAX. MIN. MAX. VCC = 1.2 V tPHL/tPLH propagation delay nI0 to nY, nI1 to nY propagation delay E to nY propagation delay S to nY VCC = 2.7 V tPHL/tPLH propagation delay nI0 to nY, nI1 to nY propagation delay E to nY propagation delay S to nY VCC = 3.0 to 3.6 V tPHL/tPLH propagation delay nI0 to nY, nI1 to nY propagation delay E to nY propagation delay S to nY tsk(0) Notes 1. All typical values are measured at VCC = 3.3 V. 2. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. AC WAVEFORMS skew see Figs 7 and 8 1.0 see Figs 6 and 8 1.0 see Figs 7 and 8 1.0 note 2 - 2.6 2.8 2.6 - 5.2 6.8 6.3 1.0 1.0 1.0 1.0 - 6.5 8.5 8.0 1.5 ns ns ns ns see Figs 7 and 8 1.5 see Figs 6 and 8 1.5 see Figs 7 and 8 1.5 3.0 3.4 3.0 5.9 7.8 7.3 1.5 1.5 1.5 7.5 10.0 9.5 ns ns ns see Figs 7 and 8 - see Figs 6 and 8 - see Figs 7 and 8 - 16 17 16 - - - - - - - - - ns ns ns
handbook, halfpage VCC
E input GND
VM
t PHL VOH nY output VOL VM
t PLH
MNA485
VM = 1.5 V at VCC 2.7 V; VM = 0.5VCC at VCC < 2.7 V; VOL and VOH are typical output voltage drop that occur with the output load.
Fig.6 Enable input (E) to output (nY) propagation delays.
2002 Mar 15
8
Philips Semiconductors
Product specification
Quad 2-input multiplexer
74LVC157A
handbook, halfpage
VI VM
nI0, nI1, S input GND
t PHL VOH nY output VOL VM
t PLH
MNA486
VM = 1.5 V at VCC 2.7 V; VM = 0.5VCC at VCC < 2.7 V; VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 Data inputs (nI0, nI1) and common data select input (S) to output (nY) propagation delays.
handbook, full pagewidth
S1 VCC PULSE GENERATOR VI D.U.T. RT CL 50 pF RL 500 VO RL 500
2 x VCC open GND
MNA368
VCC 1.2 V 2.7 V 3.0 to 3.6 V VCC 2.7 V 2.7 V
VI
tPLH/tPHL open open open
Definitions for test circuits: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.8 Load circuitry for switching times.
2002 Mar 15
9
Philips Semiconductors
Product specification
Quad 2-input multiplexer
PACKAGE OUTLINES SO16: plastic small outline package; 16 leads; body width 3.9 mm
74LVC157A
SOT109-1
D
E
A X
c y HE vMA
Z 16 9
Q A2 A1 pin 1 index Lp 1 e bp 8 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 0.069 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.050 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
0.010 0.057 0.004 0.049
0.019 0.0100 0.39 0.014 0.0075 0.38
0.244 0.041 0.228
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
2002 Mar 15
10
Philips Semiconductors
Product specification
Quad 2-input multiplexer
74LVC157A
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A X
c y HE vM A
Z 16 9
Q A2 pin 1 index Lp L 1 bp 8 wM detail X A1 (A 3) A
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.0 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 6.4 6.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.00 0.55 8 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC MO-150 EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 99-12-27
2002 Mar 15
11
Philips Semiconductors
Product specification
Quad 2-input multiplexer
74LVC157A
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c y HE vMA
Z
16
9
Q A2 pin 1 index A1 Lp L (A 3) A
1
e bp
8
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.10 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1.0 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.40 0.06 8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC MO-153 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-04-04 99-12-27
2002 Mar 15
12
Philips Semiconductors
Product specification
Quad 2-input multiplexer
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.
74LVC157A
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
2002 Mar 15
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Philips Semiconductors
Product specification
Quad 2-input multiplexer
Suitability of surface mount IC packages for wave and reflow soldering methods
74LVC157A
SOLDERING METHOD PACKAGE WAVE BGA, HBGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable REFLOW(1) suitable suitable suitable suitable suitable
2002 Mar 15
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Philips Semiconductors
Product specification
Quad 2-input multiplexer
DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development DEFINITIONS
74LVC157A
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Preliminary data
Qualification
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2002 Mar 15
15
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2002
SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613508/03/pp16
Date of release: 2002
Mar 15
Document order number:
9397 750 09451

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